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Director Engineering (Design Verification) @ Infosys

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 Director Engineering (Design Verification)

Job Description

    We are seeking a Director of Engineering (Design Verification) to oversee and expand our DV practice. With over 15 years of experience in SoC/ASIC verification, exceptional technical expertise, demonstrated leadership abilities, and the talent to motivate high-performing teams, you will play a pivotal role in our organization. Responsibilities include leading end-to-end SoC/ASIC Design Verification programs, establishing DV methodologies, flows, and best practices (UVM, SV, C-based), delivering technical leadership and practical problem-solving, managing and guiding top-performing engineering teams, collaborating with cross-functional teams for project success, driving customer engagement, ensuring delivery excellence, and supporting business development through pre-sales and technical discussions. The ideal candidate will possess a minimum of 15 years of semiconductor design verification experience, including at least 5 years in a leadership capacity. Proficiency in SystemVerilog, UVM, C/C++ co-simulation, and testbench architecture is essential. In-depth knowledge of ARM architecture, AMBA protocols (AXI, CHI, APB), high-speed interfaces (PCIe, DDR, Ethernet), Formal Verification, GLS, coverage closure, GLS methodology/flows, VIP Integration & Sequence usage, C-SV co-simulation, and Python scripting is required. Strong skills in people management, mentoring, and stakeholder engagement are also critical. Joining Seminovaa offers you the chance to be part of a rapidly growing semiconductor services company, led by its founder. You will have the opportunity to shape and lead the Design Verification practice, working on cutting-edge projects in AI, Automotive, Networking, and High-Performance Computing. Our collaborative, innovation-driven culture provides global exposure and a dynamic work environment. Apply now by sending your profile to hidden_email. #SemiconductorJobs #VLSICareers #ChipDesign #NowHiring #Seminovaa #DFTengineers #Verificationengineers #PhysicalDesignEngineers,

Employement Category:

Employement Type: Full time
Industry: Engineering / Construction
Role Category: Not Specified
Functional Area: Not Specified
Role/Responsibilies: Director Engineering (Design Verification)

Contact Details:

Company: Seminovaa
Location(s): Karnataka

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Keyskills:   UVM SV SystemVerilog ARM architecture PCIe DDR Ethernet Formal Verification GLS

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