Develops and drives digital IP architecture specifications for SoC independent, highly optimized, modular, and configurable IP based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle. Drives digital IP functionality, connectivity, configuration, performance, timing, power, and area goals. Evaluates feasibility tradeoffs. Explores and defines new approaches and novel architectures for IP. Invents, conceptualizes, and specifies microarchitecture and architectural features for next generation IP. Develops modeling scenarios and modeling infrastructure for new architectures/features for digital IPs. Performs modeling simulations, estimation, and optimization for power and area, conducts analysis of test results using advanced statistics and data predictions for benchmarking, and determines areas for improvement. Provides experimental/proof of concept design alternatives for meeting IP performance, power, and area constraints. Reviews, challenges, and influences cross functional roadmaps, and defines technology targets for future digital IPs ensuring IP architecture is cohesive and coherent. Collaborates with IP design engineers and IP verification engineers to design and validate SoC independent IPs. Supports SoC architects, SoC design engineers, and SoC verification engineers in selecting, configuring, integrating, and validating SoCs that utilize digital IPs.
QualificationsMinimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
- BE / BTech / ME / MTech / MS with 8 to 12 years of experience.
- Familiar with industry standard protocol such as AMBA, CXL, PCI, etc. Understanding SOC and IP development and work flow
- Understanding RTL coding with configurability and their tradeoffs on PPA (power, performance and area)
- Solid presentation and documentation skills
Preferred Qualifications:
- Worked on configurable IP product architecture or uArch
- Experienced with producer / consumer model, credit based flow control, clock domain crossing schemes, low power and/or System deadlock scenario and analysis
- Developed fabric or bridge IP from scratch, product release to successful working silicon
Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.
Our Client is a mid level web and mobile application development company located at Kovilambakkam.