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Asic Engineering Layout Leader | Custom Ic Layout, Analog @ Cisco

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 Asic Engineering Layout Leader | Custom Ic Layout, Analog

Job Description

Meet the Team

At Cisco Systems , the Client Optics Group (COG) Engineering team is at the forefront of building next-generation optical interconnect solutions powering high-speed networking. The team focuses on delivering cutting-edge 100G, 200G, and 400G per lambda technologies that enable scalable, high-performance data movement across modern infrastructure.

As a Layout Lead, you will work within a highly collaborative, cross-functional environment alongside analog and mixed-signal designers, digital engineers, packaging experts, process technologists, and validation teams. Together, you will drive end-to-end development of complex silicon solutions that are critical to Cisco s innovation in optics and high-speed connectivity.

Your Impact

In this role, you will provide technical leadership and drive the physical implementation of high-performance analog and mixed-signal designs from concept through tapeout.

You will:

  • Lead end-to-end layout development for complex analog, mixed-signal, and high-speed circuits including SerDes and PAM4 interfaces
  • Own block-level and top-level floorplanning, placement, routing, and integration
  • Translate circuit schematics and performance requirements into optimized, manufacturable layouts
  • Optimize designs for parasitics, matching, signal integrity, power integrity, thermal behavior, and yield
  • Ensure compliance with all physical verification requirements (DRC, LVS, ERC, EM/IR, density, reliability)
  • Drive integration across analog, digital, and high-speed domains including clocking and control logic
  • Support post-layout extraction, simulation closure, and tapeout readiness
  • Partner with packaging teams on bump planning, pad ring, ESD, and overall package integration
  • Identify and resolve layout challenges impacting performance, yield, or manufacturability
  • Lead design reviews, assess trade-offs, and mitigate tapeout risks
  • Improve layout methodologies, flows, and automation in collaboration with CAD teams
  • Mentor junior engineers and strengthen layout best practices across the team
  • Support silicon bring-up, debug, and failure analysis
Minimum Qualifications
  • Bachelor s or Master s degree in Electrical Engineering or a related field
  • 7+ years of experience in custom IC layout (analog, mixed-signal, or high-speed designs)
  • Proven experience leading block-level or top-level layout through full tapeout cycles
  • Strong expertise in custom layout, parasitic-aware design, and physical verification
  • Hands-on experience with industry-standard tools such as Cadence Virtuoso (or equivalent)
  • Solid understanding of DRC, LVS, ERC, and physical signoff methodologies
Preferred Qualifications
  • 10 12 years of experience in advanced-node layout implementation (FinFET, GAA, or similar technologies)
  • Deep expertise in layout techniques such as common-centroid, interdigitation, shielding, and isolation
  • Strong understanding of signal integrity, power integrity, and thermal effects in high-speed designs
  • Experience working on SerDes, PAM4, or other high-speed interface designs
  • Familiarity with EM/IR analysis, parasitic extraction, and reliability considerations
  • Experience with scripting (Python, Perl, or TCL) for automation
  • Comfortable working in Linux-based environments
  • Demonstrated technical leadership and ability to drive execution across global, cross-functional teams
  • Strong communication, problem-solving, and collaboration skills
Why Cisco

At Cisco, we re revolutionizing how data and infrastructure connect and protect organizations in the AI era and beyond. We ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint.

Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.

We are Cisco, and our power starts with you.

Disclaimer : This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

Job Classification

Industry: IT Services & Consulting
Functional Area / Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Design Team Lead
Employement Type: Full time

Contact Details:

Company: Cisco
Location(s): Bengaluru

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Keyskills:   Automation ASIC Simulation Linux Analog CAD thermal Packaging Perl Python

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