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FPGA validation Engineer @ UST

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UST  FPGA validation Engineer

Job Description

Roles and Responsibilities :

  • Design, develop, and execute test plans for silicon validation of DDR memory products.
  • Collaborate with cross-functional teams to identify and resolve issues related to hardware design, firmware development, and system integration.
  • Develop and maintain documentation on test procedures, results, and defect reports.
  • Troubleshoot complex problems using debugging tools such as oscilloscopes, logic analyzers, etc.

Job Requirements :

  • 5-10 years of experience in silicon validation engineering with expertise in DDR memory technologies (DDR4/DDR5).
  • Strong understanding of SERDES protocols (e.g., PCIe Gen2/3/4) and their application in high-speed data transfer.
  • Experience working with various types of memories including DRAM, flash memory, EEPROMs, etc.

Job Classification

Industry: IT Services & Consulting
Functional Area / Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Hardware - Other
Employement Type: Full time

Contact Details:

Company: UST
Location(s): Hyderabad

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Keyskills:   FPGA Validation Ddr Silicon Validation Serdes Post Silicon Validation

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