Pre Silicon Validation/Emulation Engineer @ VMware

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Pre Silicon validation /emulation engineer responsible for test plan development, test scenario creation and validation of IPs/ SoCs on Palladium or Zebu emulation platforms

Skills

Knowledge of one or more protocols : PCIe, LPDDR, SPI, USB, AXI

Knowledge of ARM SoC Architecture

Strong experience in C programming language and Assembly Language.

Strong experience in one or more scripting languages Perl/Python/TCL etc.

Excellent debugging and problem solving capabilities

Debugger interface knowledge (Coresight/UltraSoC, Lauterbach, JTAG)

Familiarity with usage of SNPS VIP/transactor models and usage

Experience on other emulation platforms (Palladium)

Experience on Zebu compilation/build flows is a plus

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