We''re looking for a PCIe Developer to join our team.
Responsibilities
Design and develop PCIe controller features using modern C++
Implement PCIe transaction layers, data path logic,MAC layer, protocol handling, and error recovery mechanisms.
Work closely with hardware/RTL teams on PCIe IP integration, debug, and bring-up.
Develop and maintain PCIe TLP/ DLLP/ LTSSM handling modules.
Contribute to the development of drivers, firmware modules, or board-level diagnostics for PCIe devices.
Implement performance improvements including latency reduction, throughput optimization, flow control tuning, etc.
Participate in post-silicon validation, debugging link training issues, and compliance interoperability problems.
Build unit tests, system tests, and simulation testbenches for PCIe components.
Collaborate with cross-functional teams including Silicon, FPGA, Validation, and Firmware.
Skills
Must have
5-8 years of experience
Strong C++ programming experience.
Hands-on PCIe development experience (not just usage):
TLP formatting and parsing
Data link layer concepts
LTSSM understanding
Flow control mechanisms
Virtual Channel (VC), Traffic Class (TC), Completion rules
MSI/MSI-X, BARs, configuration space access
Experience developing or debugging PCIe controllers, endpoint or root complex.
Strong understanding of PCIe Base Spec (Gen6).
Experience with logic analyzers, PCIe protocol analyzers, or hardware bring-up.
Good understanding of low-level system concepts: DMA, MMIO, interrupts, caching, coherency.
Experience in Linux/Windows system programming is a plus.
Strong problem-solving skills in a real-time embedded or system-level environment.
Nice to have
Exposure to PCIe Gen5/Gen6, SR-IOV, ATS, PASID, PRI, IDE
SystemC knowledge
Job Classification
Industry: LegalFunctional Area / Department: Engineering - Software & QARole Category: Quality Assurance and TestingRole: Software Developer in Test (SDET)Employement Type: Full time