R&D Engineer
- VMware
- 10 - 18 years
- Bengaluru
- 2 months ago
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Job Description
As part of TLR team (top-level-route), R&D Engineer is primarily responsible for :-
1) Place and Route, CTS, Routability analysis with respect to congestion
2) we'll versed in physical verification aspect, DRC, LVS, Antenna, LUP, ( chip finishing and Tapeout)
3) Meeting RC requirements for manual/special signals
4) Good understanding of Calibre DRC/LVS/DFM, DFY, ERC and ESD latchup
5) Responsible for all the integrity checks (chip-finishing) and post Tapeout eJob view release,
6) Good scripting knowledge perl and TCL, familiar with Caliber, Innovus,
7) Understanding of VLSI fabrication process,
8) Implementing timing ECOs
Implementing IR drop fixes, RC extraction, signal EM fixes, and Trans, Cap, Noise fixes
Implementing IR drop fixes, RC extraction, signal EM fixes, and Trans, Cap, Noise fixes
9) Open to new responsibilities in the context of rapid technological change
10) Good communication skills, work closely with the team members to accomplish PD milestone
11) Secondary competencies:- Good understanding of CTS, STA, PTSI and timing
Relevant experience of CAD tools Cadence Innovus, Calibre is preferred
Job Classification
Industry: Software ProductFunctional Area / Department: Engineering - Hardware & NetworksRole Category: HardwareRole: Physical Design / Layout EngineerEmployement Type: Full timeContact Details:
Company: VMwareLocation(s): Bengaluru+ View Contact
Keyskills: Fabrication STA Cap VLSI CAD Physical verification Perl Signalling Scripting
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