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Senior FPGA Design Engineer @ Tudip Technologies

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 Senior FPGA Design Engineer

Job Description

Job Summary
We are seeking a highly skilled FPGA Design Engineer with expertise in L2 Ethernet Switching RTL to join our dynamic team. In this role, you will be responsible for designing, implementing, and verifying FPGA-based solutions for Layer 2 (L2) Ethernet switching functionalities. The ideal candidate will have a strong background in FPGA design, RTL coding, and Ethernet protocols, along with a passion for pushing the boundaries of technology.
What you ll do
  • Design and develop FPGA-based solutions for Layer 2 Ethernet switching functionalities, including VLAN tagging, frame forwarding, MAC address learning, and multicast filtering.
  • Implement RTL code for Ethernet switch features using Verilog or VHDL, ensuring high performance and low latency.
  • Collaborate with cross-functional teams including hardware engineers, software engineers, and system architects to define system requirements and interface specifications.
  • Conduct RTL simulation and verification to ensure functional correctness and adherence to design specifications.
  • Optimize FPGA designs for area, power, and performance metrics, considering constraints such as resource utilization and timing closure.
  • Work closely with validation engineers to develop test plans and perform FPGA validation testing to ensure robustness and reliability.
  • Provide technical support to hardware and software teams during integration, debugging, and system bring-up phases.
  • Stay current with industry trends and advancements in FPGA technologies, Ethernet standards, and networking protocols.
What we re looking for
  • Solid experience in FPGA design and development, with a focus on RTL coding for networking applications.
  • Proficiency in Verilog or VHDL programming languages and FPGA development tools such as Vivado.
  • Strong understanding of Ethernet protocols and networking concepts, particularly Layer 2 switching functionalities.
  • Familiarity with Ethernet switch architectures, MAC address tables, VLANs, and multicast protocols.
  • Experience with FPGA synthesis, place-and-route, and timing closure techniques.
  • Ability to work effectively in a collaborative team environment, with excellent communication and interpersonal skills.
  • Proven problem-solving abilities and a detail-oriented mindset.
  • Prior experience with Ethernet switch ASIC/FPGA development is a plus.
  • Prior experience with System Verilog is a plus.
  • 8+ years of relevant industry experience
Must have
  • Bachelor s Degree in Electrical, Electronics and Communication Engineering, or related field or on the job-related experience
  • Analytical mindset and good problem-solving skills
  • Excellent written and verbal communication skills and attention to detail
  • Ability to work as part of a team
  • Collaborate in a friendly, energetic, cross-functional, and open environment

Job Classification

Industry: IT Services & Consulting
Functional Area / Department: Data Science & Analytics
Role Category: Data Science & Machine Learning
Role: Data Engineer
Employement Type: Full time

Contact Details:

Company: Tudip Technologies
Location(s): Pune

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Keyskills:   ASIC VHDL Networking FPGA Ethernet Debugging CMMI System verilog VLAN Technical support

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Tudip Technologies

Tudip Technologies is a value driven Software Services company. We deliver excellence in terms of dedicated and business- centric web solutions incorporated with innovation and expertise as the tools to achieve business goals. Our high quality, cost effective, reliable and scalable services have...