Quest Global Hiring DV Engineer

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Quest Global Hiring DV Engineer

Quest Global
5 - 10 years
Malaysia
3 months ago
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Job Description

Job scope :

Location : Penang, Malaysia

Experience : 5-9 Years

Subsystem Level Verification.
Test Plan Writing, Knowledgeable in UVM and System Verilog, Debugging RTL issues, Coverage Writing and SVA Waveform debug using Verdi.
Knowledgeable in USB waveform is a plus.
MUST have more than 5 years of DV experience.
MUST work in Penang, Malaysia.

Please forward your updated profile to ch****************u@qu*********l.com below details

Current CTC :

Expected CTC:

Notice Period :

Job Classification

Industry: Electronic Components / Semiconductors
Functional Area / Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Design Verification Engineer
Employement Type: Full time

Contact Details:

Company: Quest Global
Location(s): Malaysia

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Keyskills: Design Verification USB Ethernet UVM System Verilog Ddr

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Preferred City (* max. 2 w/comma)

Designation / Expected Role

Current / Recent Company (*)

Experience (*)

Expected Salary (*)

Desired Industry (*):

Functional area / Department (*):

Enter Skills (key skills, subjects, technologies & roles to use in search)

Write briefly about yourself, your experience and education (*)

Attach ResumeMax 2.38 MB (RTF, PDF, DOC, DOCX formats only parsed)

Please, check the file size and type.

Add social media [ + ]

Create password

I agree with website service terms and conditions

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Quest Global

Synapse Quest Global is an industry leader & one among the fastest growing Service company in design services in the world and is the engineering backbone of most top tier Semiconductor and System companies around the world. Synapse Design target customers are companies with $1 billio...

Quest Global Hiring DV Engineer

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