Years of experience required: 8-12 with min 5+ in suitable area 4. GCC/non-GCC status: Non GCC 5. Location: Bangalore
Perform system-level validation and debug of heterogeneous HPC compute subsystems involving CPU clusters, GPUs, AI accelerators, memory interconnects, and HSIO interfaces. Workload-oriented validation to ensure scaling, performance, and reliability.
Validate CPU/GPU pipelines, AI engines, and shared memory interactions in server SoCs. Run performance and stress workloads (MLPerf, GPGPU, HPC apps) across compute domains. Debug coherency, cache, memory access, and interconnect issues (PCIe, CXL, HBM/DDR). Validate system-level power states, boot flows, and driver stack interactions. Automate regression, triage failures, and ensure data center readiness of silicon.
Required Skills
8+ years in silicon validation of server-grade CPUs, GPUs, or AI, 8+ accelerators
Deep understanding of HPC system architecture (NUMA, cluster modes, interconnect scaling).
Multi-domain validation with experience in CPU-GPU-accelerator coherency testing.
Strong understanding of coherency, interconnects, shared memory, and compute kernel behavior Memory and IO stress, bandwidth profiling, latency tuning Hands-on with debug tools, benchmarking, and Python/C-based test automation Familiarity with Linux platforms, HPC clusters, or virtualized server environment

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