Manager - Verification - Engineer - Hyderabad @ Advanced Micro

THE ROLE:

This person will be part of next generation Server SoC Verification team. Requires strong hands - on knowledge of all facets of the IC design process and good understanding of VerilogSVUVM. A Person who will interact with multiple teams from multiple locations.

Key responsibilities:

• Knowledge of Integration of IPs into SOC
• Participating in the pre - silicon verification for full chip, blocks, multi - chip and system level verification
• Verification Testbench understanding and working experience
• Power Gating (PG) and Power management verification
• self - checking, reusable, automated verification environment : both at full - chip & block level
• Constrained random generators and reference models
• • Expertise on low power verification (NLPMVSIMUPFCPF) is highly preferred
  • Minimum 10+ years of experience in Managing ASIC Design Verification teams
  • Must have excellent knowledge of ASIC Design Flow
  • Experience with coverage - based verification methodology
  • Experience in writing testplans and testcases
  • Excellent debug skills in both functional simulations are must.
  • Experience in random test generation, coverage analysis, failure debug
  • Strong Verilog, SystemVerilog, PLI interface, CC++, Perlshell scripts programming skills.
  • Must have good communication skills and the ability and desire to foster a team environment.