AMS Verification - Lead Engineer
- Cyient
- 4 - 8 years
- Hyderabad
- 5 months ago
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Job Description
BE/B.Tech in ECE /M.Tech in VLSI with 6 to 9 years experience in Analog Mixed Signal Verification
Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks
Very Good experience in Analog Mixed Signal verification simulation tools
Good experience in System Verilog, UVM methodologies
Able to train the team members and guide them to the solutions for problems
Good experience in creating the AMS Verification environment and able to create AMS Verification environment from scratch.
Good experience in Gate level netlist simulation
Experience in Python, Perl, Shell scripting is added advantage.
Good communication and documentation skills
Job Classification
Industry: IT Services & ConsultingFunctional Area / Department: Engineering - Hardware & NetworksRole Category: HardwareRole: Design Verification EngineerEmployement Type: Full timeContact Details:
Company: CyientLocation(s): Hyderabad
Keyskills: modeling ams simulation tools scripting orcad embedded systems power management pcb designing shell scripting perl i2c system verilog verification communication skills mixed signal python c documentation schematic uvm spi verilog analog microcontroller hardware design vlsi
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