IP Verification Engineer - UVM Verification
- TekWissen
- 5 - 8 years
- Hyderabad
- 2 months ago
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Job Description
Overview:
TekWissen is a global workforce management provider throughout India and many other countries in the world.
Position: IP Verification Engineer - UVM Verification
Location: Hyderabad
Work Type: Onsite
Job Type: Full time
Job Description:
- System Verilog based UVM Functional verification, Behavioral modelling of functional blocks.
- System level performance verification, traffic patterns, bandwidth & latency analysis.
- Expertise in AXI4 bus protocol.
- Experience in Network On Chip (NOC) protocol.
- Experience in multi-master, multi-slave AXI4 use-case configurations.
- Knowledge of DRAM memory controllers.
- Develop and execute test benches to validate the functionality and correctness of models, as well as participate in system-level testing and debugging.
Basic Job Deliverable
- Setup verification environment and bring up simulations with various simulations such as VCS / Questa / Xcellium / Riviera
- SV/UVM Functional verification
- Expertise in Vivado for simulation debugs
TekWissen Group is an equal opportunity employer supporting workforce diversity.
Job Classification
Industry: Electronic Components / SemiconductorsFunctional Area / Department: Engineering - Hardware & Networks
Role Category: Hardware
Role: Design Verification Engineer
Employement Type: Full time
Contact Details:
Company: TekWissenLocation(s): Hyderabad
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Keyskills: System Verilog Sv Design Verification NETWORK ON CHIP UVM Ip Verification
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