Role: Post Silicon Validation Engineer or ATE Engineer
Location: Bangalore
Mode: 5 Days office
NP: less than 30 Days
Exp: 2+ years
Must Skills: ATE, Advantest 93K/ V 93K/HDMT, Python .
Job Description:
Keyskills: C++ Automation JTAG X86 Hardware design Test planning Semiconductor manufacturing silicon validation Python Data extraction