Analog Layout Design Engineer
- Intel
- 9 - 14 years
- Bengaluru
- 1 month ago
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Job Description
Design the complex analog layout of sensitive analog components, although not limited to, such as receivers, transmitters, clocking and LDO circuitry for Foundational IP's in Intel's current and next-generation process nodes.Responsibilities of the role include, although not limited to:-Designs complex layouts of analog signal circuits for a given design specification and runs complete set of design verification tools for process design rules, electron migration, voltage drop (IR), ESD, and other reliability checks on the layouts.-Designs and analyzes floorplans, power grid, ESD, bumps, and performs all required verification on the analog blocks.-Performs the floor-planning and detailed signal planning of complex analog circuits to meet performance and electrical requirements (shielding, matching) for critical signals to optimize for area, power, RV, and performance.-Develops and drives new and innovative analog layout methodologies to improve layout productivity and quality.-Collaborates with analog circuit design, SD, SIPD, process technology, and package design teams to meet design specifications, plan work, and negotiate layout tradeoffs as needed.-Troubleshoots a wide variety of issues up to and including design and tool/flow/methodology used in analog layout design.-Excellent communication and expected to drive clarity across customers, stakeholders, partners, managers by clearly and concisely summarizing problems, status, data, and proposals both orally and in writing.-Excellent teamwork and being flexible in assignment as per project needs.Qualifications
Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.Minimum Qualifications: M.Tech in Electronics/Electrical/VLSI Design Engineering with 8+ years or B.E/ B.Tech Electronics/Electrical/VLSI Design Engineering with 9+ years of relevant experience in Analog and IO IP design e.g. GPIOs, Thermal Sensor, PLL, ADC/DAC/ Voltage regulators/LDOs, LVDS etc.Preferred Qualifications:Analog/Mixed Signal Layout FundamentalsReliability Verification.Cadence Virtuoso Layout SuiteIP Design Planning, Top Metal/Analog Routing Design
Job Classification
Industry: Electronic Components / SemiconductorsFunctional Area: Electronic Components / Semiconductors
Role Category: Hardware
Role: Physical Design / Layout Engineer
Employement Type: Full time
Contact Details:
Company: IntelLocation(s): Bengaluru
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