10+ Years ofexperience, BTech/MTech
As Sr RTL DesignLead, the candidate is expected to have prior experience in defining the MicroArchitecture, methodology flow and RTL implementation IPs and SoC Integration.
The candidate willmeet regularly with other functional team members such as Architects, RTL andDFT Engineers, Verification Engineers, Physical Designers, CAD Engineers,Product Engineers and Program Management to ensure successful and timelyproject completion.
Responsibilities
Participatein the development of SoC architecture solutions, and analyse implementationtrade-offs
Evaluationof third party IP to check the functional feasibility and PPA targets
Definearchitecture for next-gen ASICs (ARM Cortex M series) including processorsystem, IO Peripherals, platform management, interconnect, and memory subsystem
Implementationof design in RTL, SoC Integration etc.
Collaboratewith cross functional teams - DFT, DV and Physical Implementation teams
Workwith other architects, design/verification, and software for the IP development& acquisition
Desired Skills
Strongfoundation in SoC architecture and processor systems with proven years ofexperience
Provenexperience in ARM Cortex M based SoCs
Goodunderstanding of Embedded Software architecture (Bare Metal)
Excellentknowledge of CPU, AXI Interconnect, and I/O peripherals
Goodanalytical problem solving, and attention to details
Workingknowledge of C, SystemVerilog, and Python
Excellentwritten and verbal communication skills
Knowledgeof SOC development flow and accelerator IP
Experiencein micro-architecture and digital design/verification
Knowledgeof power management, boot, security and memory architectures
Exposureto performance modelling and analysis will be a plus