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6-12 Years of
experience in DV
6+ years of
experience in AMS Verification is a must
Responsibilities
Experience in
Co-simulation (RTL + Spice)
Good understanding
on Analog blocks
Experience in System
Verilog, UVM is must
Experience in WREAL,
RNM, Vams modelling is a plus
Desired Skills
Experience in WREAL,
RNM, Vams modelling is a plus

Keyskills: Simulation Product innovation Analog Consulting UPS System verilog RTL Management UVM