Front End Design Engineer - Positions 2
- ACL Digital
- 4 - 6 years
- Hyderabad
- 2 months ago
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Job Description
Minimum of 4-6 years experience
Worked with EDA tools that enable RTL quality checks
Experience with analyzing the STA timing reports and identifying both the design and constraints related issues.
Ability to multitask, ramp up quickly on new flows/tools/ideas.
Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc. - other EDA tool experience acceptable
REQUIREMENTS:
Attention to the detail
Very good communication skills (both written and verbal)
Fast learner and self-starter. Need to execute our custom regression scripts/quality checks for our complex designs (Multimode, multimillion gates and multiple partitions)
Understand the PT/DC checks and review the reports to help clean up in order to meet each milestone targets
Summarize the regression results periodically to track the progress.
Able to debug the basic issues like SDC loading errors, check timing (no clock, unconstrained, no_clock, QoR violations)
EDUCATION:
Bachelors degree.
Job Classification
Industry: IT Services & ConsultingFunctional Area / Department: Engineering - Software & QA
Role Category: Software Development
Role: Front End Developer
Employement Type: Full time
Contact Details:
Company: ACL DigitalLocation(s): Hyderabad
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Keyskills: Basic STA Product innovation EDA tools Front end design Consulting Debugging UPS RTL Management
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