Hiring For (vlsi) Design Verification (dv) @ Oracle

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Hiring For (vlsi) Design Verification (dv)

Oracle
2 to 6 Yrs
karnataka
2 months ago
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Job Description

Position: (VLSI) Design Verification (DV) Desired Profile Skills: Functional specifications of the IPs, subsystems and SOC Reviewing and Revising System Verilog UVM Performing RTL simulations using Synopsys and Cadence simulators Performing UPF Notice Period: Immediate Joiners Education: BE, B.Tech, ME, M.Tech Location: Bangalore, Hyderabad, Kochin, Pune Email: hidden_email,

Employement Category:

Employement Type: Full time
Industry: Engineering / Construction
Role Category: Not Specified
Functional Area: Not Specified
Role/Responsibilies: Hiring For (vlsi) Design Verification (dv)

Contact Details:

Company: krazy mantra hr
Location(s): Karnataka

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Keyskills: System Verilog UVM subsystems SOC

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Preferred City (* max. 2 w/comma)

Designation / Expected Role

Current / Recent Company (*)

Experience (*)

Expected Salary (*)

Desired Industry (*):

Functional area / Department (*):

Enter Skills (key skills, subjects, technologies & roles to use in search)

Write briefly about yourself, your experience and education (*)

Attach ResumeMax 2.38 MB (RTF, PDF, DOC, DOCX formats only parsed)

Please, check the file size and type.

Add social media [ + ]

Create password

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Hiring For (vlsi) Design Verification (dv) @ Oracle

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