ASIC Engineer, Design Verification
- Meta
- 9 - 10 years
- Bengaluru
- 2 months ago
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Job Description
- Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification
- Develop functional tests based on verification test plan
- Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage
- Debug, root-cause and resolve functional failures in the design, partnering with the Design team
- Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality
- Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry
Minimum Qualifications
- Bachelors degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience of at least 9+ years
- Track record of first-pass success in ASIC development cycles
- Hands-on experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology
- Experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM based methodologies
- Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation
- Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments
- Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle
- At least 9+ years of hands on experience
Preferred Qualifications
- Experience in development of UVM based verification environments from scratch
- Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs
- Experience with revision control systems like Mercurial(Hg), Git or SVN
- Experience with verification of ARM/RISC-V based sub-systems or SoCs
- Experience with IP or integration verification of high-speed interfaces like PCIe, DDR, Ethernet
- Experience working across and building relationships with cross-functional design, model and emulation teams
Job Classification
Industry: InternetFunctional Area / Department: Engineering - Hardware & Networks,
Role Category: Hardware
Role: Design Verification Engineer
Employement Type: Full time
Contact Details:
Company: MetaLocation(s): Bengaluru
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Keyskills: C++ ASIC Networking SOC Verilog Ethernet Test planning Perl PCIE Python
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