Senior ISP IP Design Lead
- Paradigmit Technology
- 3 to 8 Yrs
- Bengaluru
- 11 months ago
- Email to a friend
- Report this job
Job Description
The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation of Echo devices is looking for a Senior ISP IP Design Lead to continue to innovate on behalf of our customers. We are a part of Amazon Lab126 that revolutionized reading with our Kindle family of products and reimagined user experience through Echo and Alexa. We want you to help us build on the success of our first generation of ML accelerator at edge.Work hard. Have Fun. Make history.
As a Senior ISP IP Design lead, you will lead a team of ASIC developers creating Image Signal Processing IP to be deployed in a range of Amazon devices. You will develop imaging hardware IP to accelerate applications in camera, machine learning, computer vision and robotics. You will work closely with scientists, SoC Architects, software and verification teams to develop IP that meets the power, performance and area goals for Amazon devices. You will lead a new team defining the processes, methods and tools for design and implementation of large complex IP blocks.
In this role you will:
Drive micro-architecture and design of imaging IP in Verilog/SystemVerilog HDL.
Act as a technical point of contact to the different SOC development teams and lead cross functional SOC development activities.
Work with the different stakeholders and functional teams to ensure delivery of high-quality IP to SoC product teams.
Work with external IP and EDA vendors to source best in class components and tools.
Help define and own ASIC design methodologies.
Provide technical leadership through personal example, mentorship, and strong teamwork., BS degree or higher in EE or CE or CS, or equivalent experience.
7+ years of practical semiconductor ASIC design experience, including owning end to end design of major imaging SOC blocks.
3+ years of experience being a technical lead of a team of design engineers.
Successful tape outs as an owner of a major design block.
Experience and knowledge in design of image signal processors and computer vision technologies.
Experience writing RTL in Verilog/SystemVerilog and understanding architectural models and algorithms in C/C++.
Experience working with teams doing verification, FPGA and emulation.
Experience working with physical design teams doing synthesis, timing analysis and DFT.
Proficient in design methodologies and EDA tools.
Experience with system architecture & engineering.
Previous leadership or management experience in SoC development team.
Experience working with RISC-V, machine learning, or linear algebra.
Experience utilizing high level synthesis (HLS) to create RTL from C models.
Experience with advanced design verification (UVM, formal, Emulation, FPGA).
Experience with low power design, gate level testing and multi-clock design practices.
Experience developing with modern programming languages (Python, Java, C/C++), open-source technologies, and Linux.
Experience working with software teams to tightly define the HW/SW interface including control/status registers, and error handling.
Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area.
Experience with SOC bring-up and post silicon validation.
Experience with managing external IP vendors.
Excellent verbal and written communication skills.
Employement Category:
Employement Type: Full timeIndustry: IT - Software
Role Category: General / Other Software
Functional Area: Not Applicable
Role/Responsibilies: Senior ISP IP Design Lead
Contact Details:
Company: AmazonLocation(s): Bengaluru
+ View Contact
Keyskills: html brand development ui animation system architecture ads high level synthesis signal processing
Fraud Alert to job seekers!
₹ 50,000 - 2.0 Lakh/Yr
Similar positions
Job Listings
We are in open beta version of website, please let us know if any issues, at: info(at)indigojobs.in
