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Signal Integrity and Power Delivery @ Intel

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 Signal Integrity and Power Delivery

Job Description

  • In this role, you will be part of a world-class Silicon design team of highly talented engineers working on Signal and Power Integrity who will take up significant technical role and be expert in one or more technical fields.
  • Enable Signal and Power Integrity solution for serial / parallel I/Os. setting up and running simulations in ADS, Cadence PowerSI, PowerDC, OptimizePI, or equivalent Ansys Tools like Redhawk, Totem, SIwave.
  • Provides solution for Signal and power integrity on die, package and board affects performance and power of serial and parallel interfaces, such as PCIE4/5/6, TypeC, USB and DDR4/DDR5 memories.
  • Hands on Signal and Power Integrity design, frequency and time domain analysis, Simulations, System modelling, I/O modelling and measurements
  • In this position, you will be responsible for providing Silicon, package and platform Power and Signal integrity solutions and working closely with design teams for implementation.

Your responsibilities will include but not be limited to:

  • Understands different IP electrical requirements and performs comprehensive simulations and validations to generate Intel design guidelines to guide system-level signal and power integrity design including, but not limited to, Silicon, package, socket, boards, and voltage regulators.
  • Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon.
  • Perform time domain analysis in HSPICE, ADS to find noise levels in I/O rails.
  • Provides guidance, solution space on implementation with the design team ( IP, SOC, Package and board).
  • Modelling and delivering IP SI and PI collaterals (AMI- IBIS, Die Models, ICCt, Integration guide etc..) for delivering to internal and external customer.
  • Correlating simulations with system measurements.
  • Deliver optimized SI and PI solution meeting the product performance
  • Provides DC and resistance simulation to provide Rpath from the VR to the package pins, voltage drop, current density and power loss analysis.
  • Performs transfer impedance simulations to provide plane split and isolation guidance between interfaces on board package area.
  • Interface with customers and in-house IP, SOC and platform teams to provide the solution to meet the Specification.


Qualifications:

  • Candidate must possess a bachelors degree or Masters in Electrical or Electronic Engineering.
  • 3 - 10 years of experience in Silicon, package and board level power integrity design.
  • Solid understandi

Job Classification

Industry: Electronic Components / Semiconductors
Functional Area: Production, Manufacturing & Engineering,
Role Category: Engineering
Role: Engineering
Employement Type: Full time

Education

Under Graduation: Any Graduate
Post Graduation: Any Postgraduate
Doctorate: Any Doctorate

Contact Details:

Company: Intel
Location(s): Bengaluru

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Keyskills:   System architecture Simulation USB SOC CAD Ansys PCIE Silicon MATLAB Signal integrity

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