SOC Low power Design Engineer @ Advanced Micro

THE ROLE:

• As Part of the SOC design team you will have technical responsibility for Low power design activities. You will work closely with IP development teams and SOC design and verification teams

• You will be responsible for the integrity and quality of your design collaterals and will perform the required checks.

• You will work with verification teams for simulation and debug of issues related to the SOC design and functions involving multiple IP

• You will work with front-end integration teams on synthesis of the SOC top-level netlist and also collaborate with physical design on modifications to facilitate full-chip SOC construction techniques

THE PERSON:

• Strong self-driving ability

• Should have excellent communication skills (both written and oral)

• Strong problem-solving skills

KEY RESPONSIBILITIES:

• Experience in Low power design with very good understanding of ASIC Low power Architecture and low power concepts.

• Good understanding of Power Intent (UPF) and prior experience in power estimation and optimization is desired

• Build/optimize UPF power flow for entire SoC and verify the low power design implementation working with RTL and verification teams

PREFERRED EXPERIENCE:

• Understanding of SoC integration activities.

• Understanding of SoC Architecture

• Experience in Power Minimization techniques like clock gating, power gating, multi VT design

• Experience working with pre-Si Verification and physical design teams

• Comfort with Scripting such as Ruby, Perl, Shell and TCL is a plus

• Expertise in formal verification techniques and tools

ACADEMIC CREDENTIALS:

• 9+years of experience in SOC Design and Verilog RTL Development

• BE/B.Tech/ME/M.TECH or equivalent ECE/EEE