Synapse Design Hiring FPGA Design Engineer for Bangalore
Skill : FPGA Engineer
Experience : 5-12 Yrs
Location : Bangalore
Should have experience in working on IAR tools.
Should have experience in using Vivado SDKs for waveform debug.
Should have experience in coding / understanding C.
Should be able to understanding RTL (System Verilog).
Knowing how to generate a bit file for RTL would be a plus point
Please send me you updated Profile to ch*******r@sy*******a.com with below details
Current CTC:
Expected CTC:
Notice Period:
Best Regards
Chakradhar M , Email:ch*******r@sy*******a.com | www.synapse-da.com.
Staffing Lead - SYNAPSE Techno Design Innovation Pvt Ltd,
Prestige Shantiniketan, Commercial Complex | 8th Floor, Tower C, Gate No. 2, Near ITPL Road | Whitefield, Bangalore 560066 , Karnataka, INDIA | Office : 080 67539115 ;

Keyskills: C FPGA Design Design Engineering System Verilog
Synapse Design is an industry leader in design services and is the engineering backbone of most top tier Semiconductor and System companies around the world. Synapse Design target customers are companies with $1 billion in revenue, and we enable them to meet their technical & resource challenges...