Performs logic design, Register Transfer Level (RTL) coding, and simulation to generate cell libraries, functional units, and subsystems for inclusion in full chip designs.
Participates in the development of Architecture and Microarchitecture specifications for the Logic components.
Provides IP integration support to SoC customers and represents RTL team.
Undertaking a Bachelors Degree in ElectricalElectronic Engineering Computer Engineering or equivalent with relevant working experience
Familiar or experience in RTL design with Verilog andor VHDL Experience in System Verilog is a plus

Keyskills: RTL design VHDL Simulation FPGA SOC RTL coding rtl verification Perl System verilog Logic design
Our Client is a mid level web and mobile application development company located at Kovilambakkam.