DFT Engineer
- Intel
- 10 - 13 Years
- Bengaluru
- 4 years ago
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Job Description
Job Description :
Job Description
As an integral part of Intel's new IDM2.0 strategy, we are establishing Intel Foundry Services (IFS), a fully vertical, standalone foundry business, reporting directly to the CEO. IFS will be a world-class foundry business and major provider of US and European-based capacity to serve customers globally. Intel Foundry Services will be differentiated from other Foundry offerings with a combination of leading-edge packaging and process technology, committed capacity in the US and Europe - available for customers globally - and a world-class IP portfolio that customers can chose from including x86 cores, graphics, media, display, AI, interconnect, fabric and other critical foundational IP, along with ARM and RISC-V ecosystem IPs. IFS will also provide access to silicon design services to help our customers seamlessly turn silicon into solutions, using industry standard design packages. This business unit is completely dedicated to the success of its customers with full P and L responsibilities. This model will ensure that our foundry customers products will receive our utmost focus in terms of service, technology enablement and capacity commitments. IFS is already engaged with customers today starting with our existing foundry offerings and we are expanding imminently to include our most advanced technologies, which are optimized for cutting-edge performance, making them ideal for high-performance applications. Job Description: We are looking for DFT/DFx Design Engineers who will be responsible for SoC/SS DFT end to end execution for complex ASIC products. The SoC DFT activities will include (although not limited to) ATPG architecture concept for Stuck-at, At-speed testing, MBIST and memory repair architecture. Should be able to plan for timing friendly ATPG and MBIST clocking for quick turnaround time for high performance (1+GHz products). Must be able to work on MBIST generation/simulations, Memory repair planning, BISR Integration verification, Scan insertion, Scan timing constraints, Scan pattern generation simulation and test pattern delivery. The candidate should also have working knowledge on post si debug for ATPG, MBIST, efuse patterns etc. Work on the design, RTL/GLS validation support, automation, and/or timing analysis in the following DFT domains: TAP/Controller, Scan, Array DFT/DFx (PBIST/MBIST), IO DFT, PLL DFT or HVM Reset etc. Drive or be involved with trace/pattern generation efforts as well as post-silicon enabling, debug support, and/or analysis of the DFT features/content types you are responsible for. The ideal candidate will also have:- Strong leadership in driving execution across different functional teams and global teams. Excellent verbal and written communication skills. Effective team player with continuous learning mindset. Willingness to balance multiple tasks and work in a team environment. Work with structural design team to develop timing friendly DFT network. Possess strong teamwork, problem-solving and influencing skills along with abilities to work with different geographical locations.
Qualifications
Qualifications: You must possess the below minimum qualifications to be initially considered for this position Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Minimum Skills and Qualifications: Electronics Engineer with at least B.Tech 10yrs + or M.Tech with 8+ yrs. Expertise in key DFT features such as TAPJTAG Scan ATPG or Array DFT DFx MBIST, PBIST SOC IP DFT design integration or validation EDA Tools such as ATPG tools Mentor Tessent shell VCS simulation and/or debug tools etc Silicon enabling debug or test pattern development experiences. Preferred Skills and Qualifications: Design automation skill and proficiency in programming or scripting languages Structural Design flows including timing, routing, placement, clocking analysis High Volume Manufacturing requirements and test flows SOC - Multi core (ARM CPU preferably) ArchitectureInside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
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Employement Category:
Employement Type: Full timeIndustry: SemiconductorFunctional Area: ITRole Category: Software EngineerRole/Responsibilies: DFT EngineerContact Details:
Company: IntelLocation(s): Bengaluru+ View Contact
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