Staff/Principal Engineer -STA
- Mulya Consulting
- 7 - 12 years
- Hyderabad
- 5 years ago
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Job Description
Staff/Principal Engineer -STA
Location : Bangalore / Hyderabad
This position is a permanent position with our client (US Based Semiconductor Product Company with revenue more than 30 Billion USD)
Our client is a world leader (Top5 Semicon Company in 2018) in innovative memory solutions that transform how the world uses information. They have over 34,000 team members in 17 countries who work with the worlds most trusted brands, delivering memory and storage systems for a broad range of applications and sparking countless possibilities in technology
our vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community.
Staff/Principal Engineer -STA
Job Description
As a Design Engineer in DRAM and Emerging memory Group (DEG), you will be responsible for designing and verifying Functional Blocks used in the development of memory products. This includes simulating, optimizing, and timing analysis when deploying into DRAM circuits. In this position you will work and support the efforts of groups such as DEG Design/Verification to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction.
Responsibilities will include, but are not limited to, the following:
- Build function and timing models for standardized and customized logic design
- Perform Static Timing Analysis on the memory control logic design with industry lead EDA tools
- Deploy the RTL-IP with the standardized flow and continue improving the flow for high quality
- Supporting the RTL-IP user for layout process including floor-planning, placement, and routing
- Perform verification processes with modeling and simulation using industry standard simulators
- Maintain technical expertise and provide training
- Contribute to cross group communication to work towards standardization and group success
- Proactively solicit input from Standards, CAD, modeling, and verification groups to ensure the design quality
- Drive innovation into the future Memory generation with dynamic work environment
Successful candidates for this position will have:
- 7-13 yrs of rich experience in STA and making timing constrains based on Primetime or its counterparts
- Experience in taking an industrial specification and implementing the respective IP
- Good understanding on timing/area/power/complexity tradeoffs on complex interface design
- Familiar with IP level verification and strong RTL debugging capabilities
- Experience in frontend implementation tasks such as synthesis and logic equivalence
- Experience in large scale mix signal circuitry design including logic implementation/verification, timing analysis/optimization an advantage
- Experience in ASIC backend flow with parasitic extraction and timing closure is a plus
- Experience in liberty/Verilog model characterization is a plus
- Excellent problem-solving and analytical skills
- A self-motivated, enthusiastic team player who enjoys working with others
- Good communication skills with the ability to convey complex technical concepts to other design peers in verbal and written form
Education (One of the following is required)
- A Bachelor in Electrical Engineering or related discipline plus 9 years of experience.
- A Master in Electrical Engineering or related discipline plus 7 years of experience
About Us
As the leader in innovative memory solutions, we are helping the world make sense of data by delivering technology that is transforming how the world uses information. Through our global brands Crucial and Ballistix we offer the industrys broadest portfolio. We are the only company manufacturing todays major memory and storage technologies: DRAM, NAND, NOR and 3D XPoint memory. Our solutions are purpose built to leverage the value of data to unlock financial insights, accelerate scientific breakthroughs and enhance communication around the world.
Contact: Uday Bhaskar
Mulya Technologies
"Mining the Knowledge Community"
Email id : mu**********r@ya**o.com
Job Classification
Industry: Semiconductors, ElectronicsFunctional Area: IT Software - Embedded, EDA, VLSI, ASIC, Chip Design, Role Category: Programming & DesignRole: Programming & DesignEmployement Type: Full timeEducation
Under Graduation: B.Tech/B.E. in Any SpecializationPost Graduation: M.Tech in Any Specialization, MS/M.Sc(Science) in Any SpecializationDoctorate: Any Doctorate in Any Specialization, Doctorate Not RequiredContact Details:
Company: Mulya ConsultingLocation(s): Hyderabad
Keyskills: STA Synthesis timing closure timing constraints tempus Verilog Spice RTL Coding Liberty Synopsys parsitic extraction cadence
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