Design Verification Engineer @ Synergic Emergence

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Design Verification Engineer

Synergic Emergence
12 - 20 Years
Bengaluru
3 years ago
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Job Description

Employement Category:

Employement Type: Full time
Industry: Semiconductor
Functional Area: IT
Role Category: Software Developer
Role/Responsibilies: Design Verification Engineer

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Company: Synergic Emergence
Location(s): Bengaluru

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Keyskills: Debugging RTL in block and/or chip-level IP block interoperability and SOC/System level Uvm Full Chip Verification. Writing System Verilog Assertions (SVAs). HW/SW Co-Verification NC Verilog QuestaSim.

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Current / Recent Company (*)

Experience (*)

Expected Salary (*)

Desired Industry (*):

Functional area / Department (*):

Enter Skills (key skills, subjects, technologies & roles to use in search)

Write briefly about yourself, your experience and education (*)

Attach ResumeMax 2.38 MB (RTF, PDF, DOC, DOCX formats only parsed)

Please, check the file size and type.

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Create password

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Synergic Emergence

Synergic Emergence

Design Verification Engineer @ Synergic Emergence

Home > Software Developer