Verification Engineers / Sr. Engineer / MTS @ Bangalore

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Verification Engineers / Sr. Engineer / MTS

Bangalore
2 - 8 years
Bengaluru
3 years ago
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Job Description

System verilog assertions Perl Functional + Code Coverage

Verilog and VHDL

Cadence IUS (preferred) or Mentor Questasim

Image Sensor knowledge is a plus

Experience with SPI / I2C is a plus

Qualification: B.Tech / M.Tech or equivalent from a reputed University.

Experience: 2 - 8 years of relevant experience.

Job Classification

Industry: Media, Entertainment, Internet
Functional Area: IT Software - Embedded, EDA, VLSI, ASIC, Chip Design,
Role Category: Programming & Design
Role: Programming & Design
Employement Type: Full time

Education

Under Graduation: Any Graduate in Any Specialization
Post Graduation: Post Graduation Not Required
Doctorate: Doctorate Not Required

Contact Details:

Company: Bangalore
Location(s): Bengaluru

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Keyskills: VHDL Verilog OVM Mentor Perl System verilog SPI UVM MTS

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Enter Skills (key skills, subjects, technologies & roles to use in search)

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Bangalore

Bangalore Tile Company

Verification Engineers / Sr. Engineer / MTS @ Bangalore

Home > Programming & Design