Your browser does not support javascript! Please enable it, otherwise web will not work for you.

Senior Engineer I, ASIC Design @ Microchip Technology

Home > Software Engineer

 Senior Engineer I, ASIC Design

Job Description


Summary
As a member of Microchips engineering community, your primary responsibility will be to the design, integration, and verification support of the Full Chip Architecture and Full Chip Control/Data busses for an advanced ASIC or FPGA. Microchips designs are an SOC with various Hard and Soft IP blocks that support a large number of industry standard protocols.
Duties & Responsibilities
General Full Chip Integration and Support
  • Detailed module design and integration, performance analysis and detailed design specification creation a large component of this position is to work with all design teams to ensure seamless integration of all components on the device.
  • Detailed ownership of full chip documentation of the SOC or FPGA device and/or device family.
  • Participate in the Verilog implementation and integration of full chip capabilities including interface support, integration of full chip busses (control and data network-on-chip) and documentation support at the full chip level.
  • Support full chip post-layout timing closure and verification
  • Participate in the investigation & assessment of legacy and emerging integration techniques and on-chip / off-chip network-on-chip (NOC) bus structures for both control and high speed data paths. Overall support of the full chip register map at the chip level is required.
  • Improve Data & Command processing bandwidth, reduce latencies & increase reliability
  • Support porting the design into test chips and emulation platforms
  • Support pre-tapeout verification and post-tapeout validation/characterization of the system designed
  • Work closely with FPGA support software and Firmware engineers to resolve hardware issues and customer issues
Job Requirements
Education Required
  • Bachelors/Masters in electrical engineering, Computer Engineering or Computer Science.

Experience Required
  • Minimum of 5 years of proven silicon design experience in system level integration of many different internally developed and purchased full custom and ASIC IP blocks into a full chip environment. This would also include the integration of control and high-speed data network-on-chip (NOC) busses.

Requirements
  • Experience is SOC IP development and Full Chip Integration
  • Strong technical leader that is also able to work in a team oriented environment
  • Strong Experience in Verilog design and design verification
  • Strong Experience in Static Timing Analysis and Verilog simulation tools
  • Ability to write detailed design specifications
  • Good analytical, oral and written communication skills.
  • Able to write clean, readable presentations.
  • Self-motivated, proactive team player.
  • Ability to work to schedule requirements.

Beneficial Experience
  • FPGA, ASIC System and Embedded Processor Design Experience
  • Lab Experience for System Level Validation and Support

Employement Category:

Employement Type: Full time
Industry: IT
Functional Area: IT
Role Category: Software Engineer
Role/Responsibilies: Senior Engineer I, ASIC Design

Contact Details:

Company: Microchip Technology
Location(s): Bengaluru

+ View Contactajax loader


 Job seems aged, it may have been expired!
 Fraud Alert to job seekers!

₹ Not Disclosed

Microchip Technology

Microchip Technology Inc. The Embedded Control Solutions Company? Microchip Technology Inc. is a leading provider of microcontroller and analog semiconductors, providing low-risk product development, lower total system cost and faster time to market for thousands of diverse customer applications wo...