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Principal Engineer - RtL Design Verification @ Mulya Consulting

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 Principal Engineer - RtL Design Verification

Job Description

Principal Engineer - RtL Design Verification Engineer

Location: Hyderabad

This position is a permanent position with our client (US Based Semiconductor Product Company with revenue more than 30 Billion USD)

Our client is a world leader (Top5 Semicon Company in 2018) in innovative memory solutions that transform how the world uses information. They have over 34,000 team members in 17 countries who work with the worlds most trusted brands, delivering memory and storage systems for a broad range of applications an

Our vision is to transform how the world uses information to enrich life and our commitment to people, innovation, tenacity, collaboration, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community.

Principal Engineer - RtL Design Verification Engineer

Responsibilities include, but not limited to:

The Principal Design Engineer in the Non-Volatile Memory Group , will be core technical individual contributor in design and validation of the on-chip controller and mixed signal circuitry in NAND FLASH chips. In this highly visible and challenging role, your responsibilities will include architecture development and product definition, system integration and full-chip and block-level validation plan and execution. Also RTL design and implementation of the controller hardware, synthesis, APR and full timing closure as well as development of firmware code for NAND internal operations. You will be working very closely with design teams both domestic and overseas on different projects.

Minimum Qualifications:

  • Able to lead/mentor the team 
  • Knowledge and/or experience in large scale design projects is desirable.
  • Knowledge of Digital ASIC Design methodology is required.
  • Solid knowledge and experience in Verilog language.
  • Knowledge and/or experience in synthesis and static timing analysis is desirable.
  • Knowledge and/or experience in non-volatile memory design (NAND in particular) is a strong plus.
  • Experience with mixed-mode design and validation is a plus.
  • Hands-on experience with Design/Verification CAD tools such as ncsim, Design Compiler, Formality, PrimeTime, etc.
  • Knowledge and Experience with transistor level simulators such as Spice, Ultrasim, HSIM is desirable.
  • Knowledge of TCL, PERL or Python is a plus.
  • MS degree in Electrical Engineering or BS + 10 years experience required.

About Us

As the leader in innovative memory solutions, we are helping the world make sense of data by delivering technology that is transforming how the world uses information. Through our global brands , Crucial and Ballistix we offer the industrys broadest portfolio. We are the only company manufacturing todays major memory and storage technologies: DRAM, NAND, NOR and 3D XPoint memory. Our solutions are purpose built to leverage the value of data to unlock financial insights, accelerate scientific breakthroughs and enhance communication around the world.

Contact: Uday Bhaskar

 Mulya Technologies

 "Mining the Knowledge Community"

Email id : mu**********r@ya**o.com

Job Classification

Industry: Semiconductors, Electronics
Functional Area: IT Software - Embedded, EDA, VLSI, ASIC, Chip Design,
Role Category: Programming & Design
Role: Programming & Design
Employement Type: Full time

Education

Under Graduation: B.Tech/B.E. in Any Specialization
Post Graduation: MS/M.Sc(Science) in Any Specialization, M.Tech in Any Specialization
Doctorate: Any Doctorate in Any Specialization, Doctorate Not Required

Contact Details:

Company: Mulya Consulting
Location(s): Hyderabad

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Keyskills:   Verilog Nand Primetime Formality NCSIM Spice ultrasim hsim DC

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